Anti-Static: Why All the Fuss?

Static-sensitive devices are often flagged with hard-to-miss safety labels.
Static-sensitive devices are often flagged with hard-to-miss safety labels.

By now, you’ve probably encountered plenty of notices and safety labels warning about static electricity around high-tech components.

Normally, this includes an advisory to wear a safely grounded wrist strap, or to work on top of a grounded anti-static mat.  But this doesn’t quite answer the question of why those counter-measures are even necessary; or what we can reasonably expect if we ignore them.  Today we will explore the implications and failure mechanisms caused by electrostatic discharge (ESD).

What is ESD?

The most well-known ESD event to directly affect you inside the home is probably static shock.  This is the unpleasant jolt you may feel touching something metal after walking around.  If you’re walking on carpet or tile, negatively-charged electrons can move from the flooring material to your shoes; leaving behind a positively-charged footprint.

With that excess charge, your body will radiate an electric field in all directions.  As opposite charges attract, the positive charges inside conductive objects like doorknobs, circuit boards, components, and connectors will drift through the material to follow your field as closely as possible.  If you make the mistake of handling sensitive objects without discharging yourself first, your excess charges will rush into the opposing material in one sudden burst.  This is the “discharge” in electrostatic discharge.  And depending on the conditions, ESD strikes can peak at over 10,000 volts.

More Common than it Seems

For humans in normal conditions, ESD is only a nuisance.  Even the jolts that are intense enough to see and hear pose no direct threat.

But we also cause ESD events we cannot sense.  Generally, the ESD detection threshold for human senses is around 3.5 kV.  This suggests we can subject components to ESD-level voltages without even realizing it.

Unless they are explicitly designed to handle large ESD strikes, modern components are not optimized to withstand 3.5 kV.  Digital systems like microcontrollers may include Human Body Model (HBM) or Charged Device Model (CDM) ratings in datasheets.  However, HBM and CDM only indicate protection from the manufacturing and packaging process where voltages fall well short of the 10 kV or more that can happen in the end user’s application!

The Many Effects of ESD

In small electrical circuits, the ESD pulse will propagate as a high-intensity, low-duration pulse lasting several microseconds.  The short timescale gives it a very steep rise and fall time.  Should the signal propagate through a system that is powered on, it can potentially activate edge-triggered logic.  Clock de-synchronization, data corruption, device resets, latchup or other forms of device upset are not out of the question.

ESD can cause material damage to components before they are even powered on.  In semiconductors, there are at least three different materials likely to be affected by an ESD strike…

  • Oxides: Including the gate oxides of the common Metal Oxide Field Effect Transistor (MOSFET)
  • Junctions: Where the p-type and n-type layers of transistors and diodes converge.
  • Bulk materials: This includes so-called back end-of-line (BEOL) materials like silicide, copper, aluminum and any other interconnecting material.

In the case of the gate oxides (an insulator), the jolt of highly energetic ESD electrons can generate oxide defects or rupture the oxide material.  In Figure 1 and Figure 2 below, the pinhole damage inflicted on area C2 of the diagram is exactly the type of damage that may have been avoided if appropriate ESD safeguards had been in place.

Figure 1: Source: NASA NEPP (Public Domain)
Figure 2: Source: NASA NEPP (Public Domain)

Sometimes the gate fails immediately by leaking current.  But they become more vexing when the resulting failure happens after a long delay of many days or even years.  The mechanism behind these latent failures is the injection of hot charge carriers into the oxide layer.  Those hot carriers can become permanently trapped in the oxide, degrading performance until the transistor catastrophically fails.

Once the failure finally happens, the leakage current (usually in the nA range or lower) will increase by several orders of magnitude.  When damage from a CDM-level event was analyzed, the gate was found to contain amorphous or polycrystalline silicon; rather than the crystalline form.

What Does it Mean for Developers?

As digital devices continue to scale down in size, so does their ability to withstand ESD events.  For guidance on what to do, professional developers should look to the Electrostatic Discharge Association’s standard: ANSI/ESD S20.20-2014 (or future revisions) on minimizing ESD in assembly areas.  Otherwise, the simplest way to prolong the life of your projects is to use grounded wrist straps, and a grounded dissipative work surface.

Both approaches will provide a connection to earth ground through a fixed resistance (of typically 1 MΩ to 100 MΩ).  This will bleed away excess charges without introducing all the electrical hazards and fire hazards of being the path of least resistance.  It’s also wise to have your grounding point or outlet inspected by a qualified electrician, as mis-wired outlets can be dangerous in general.

Finally, if you must handle electronics and you don’t have any anti-static tools or connections available: at the very least handle it by the very edges; or avoid handling it at all.

References

[1]B. R. Mayes, “Do I Really Need Anti-Static Protection for my Arduino?,” Voxidyne Media LLC, 2 Sep. 2019. [Online]. Available: https://unboxing-tomorrow.com/do-i-really-need-anti-static-protection-for-my-arduino/. [Accessed 26 Aug. 2020].
[2]C. R. Paul, “System Design for EMC,” in Introduction to Electromagnetic Compatibility, 2nd ed., John Wiley & Sons, Inc., 2006, pp. 753 – 775.
[3]NASA Electronic Parts and Packaging Program (NEPP), ” Microcircuit ESD Damage,” NASA Electronic Parts and Packaging Program (NEPP), [Online]. Available: https://nepp.nasa.gov/index.cfm/6095. [Accessed 3 Sept. 2020].
[4]N. Peachey and K. Mello, “ESD and EOS: Failure Mechanisms and Reliability,” in Electrostatic Discharge Protection: Advances and Applications, J. J. Liou, Ed., Boca Raton, FL, CRC Press, 2017, pp. 31-49.
[5]R. J, “Latent Gate Oxide Defects Caused by CDM-ESD,” in EOS/ESD Symposium, 1995.

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[1] Non semi-conducting products such as the foils and thin films of precision resistors are also affected.